The principle of Silicon-on-Insulator (SOI) semiconductor technology is to isolate the thin silicon active layer, where transistors are made, from the mechanical substrate. This offers substantial benefits with respect to standard BULK technology:
- Higher speed (+ 30%): Microprocessors
- Lower power consumption (-60%): Portable Devices
- RF performances & System-on-Chip (Soc) integration: Wireless
- High Temperature Electronics (> 200°C)
- Radiation hardness: Military & Space
SOI for High-speed logic and Microprocessors
SOI is now a mainstream technology for high-speed Logic and microprocessor applications. Companies like IBM, Freescale, AMD and Toshiba-Sony adopted SOI for their microprocessor products. Reduced parasitics and floating-body effect allow to increase speed by 20 to 35% and to decrease power consumption by 50 to 60%.
SOI is now entering in the high-speed ASIC game: Soisic released digital Design Kit and Libraries on Freescale 90nm PD-SOI process. SOI is also a very promising candidate for DRAM scaling with single-transistor memories taking advantage of SOI floating body effect (Innovative Silicon).
SOI for Low-power & Low-voltage Devices
SOI has shown definitive advantages for ultra-low-power and ultra-low-voltage operation. This was first demonstrated by Seiko-Epson with a SOI watch IC consuming as low as 30nA at 0.42V, i.e. one quarter of the BULK circuit.
Another Japanese company, OKI, is fabricating an IC in 0.35µm Fully-Depleted (FD) SOI consuming 150nA at 0.7V for a CASIO solar watch. OKI also successfully used FD-SOI for low-power ARM-based microcontrollers, with a power reduction of more than 60%.
Using a patented SOI circuit cell, CISSOID demonstrated an ultra-low-power power supply monitoring and reset circuit working below 1V and consuming as low as 30nA, i.e. 100 times less than other circuits on the market.
SOI for RF & Wireless Systems-on-Chip (SoC)
Probably one of the most promising SOI applications is RF and Wireless SoC. Indeed, SOI intrinsic isolation allows to easily combining high-density and low-power digital with high-performance RF/Analog front-ends.
The easiness of using high-resistivity SOI substrates (resisitvity > 1000 ohms.cm) improves isolation of 6dB at 2GHz, drastically reduces transmission lines losses (performance equivalent to GaAs or InP) and allows to design on-chip inductors and varactors with more than 60% of improvement in Q. This allows reductions of 60% in power consumption for RF blocks such as VCO’s [CISSOID-ESSIRC2005].
Deep-submicron Partially-Depleted SOI processes targeting these applications have been developed by ST Microelectronics [ST-ECS2005] and Honeywell-Cypress.
[CISSOID-ESSCIRC2005] "A Low-Power 5 GHz CMOS LC-VCO Optimized for High-Resistivity SOI Substrates", P. DELATTE, G. PICUN, L. DEMEUS, P. SIMON and D. FLANDRE, ESSCIRC 2005, Sept. 2005, Grenoble, FRANCE.
[ST-ECS2005] C. Raynaud, F. Gianesello, C. Tinella, P. Flatresse, R. Gwoziecki, P. Touret, G. Avenier, S. Haendler, O. Gonnard, G. Gouget, G. Labourey, J. Pretet, M. Marin, R. Di Frenza, D. Axelrad, P. DELATTE, G. Provins, J. Roux, E. Balossier, JC. Vildeuil, S. Boret, B. Van Haaren, P. Chevalier, L. Boissonnet, T. Schwartzmann, A. Chantre, D. Gloria, E. De Foucauld, P. Scheer, C. Pavageau, G. Dambrine, “IS SOI CMOS A PROMISING TECHNOLOGY FOR SOCs IN HIGH FREQUENCY RANGE?”, ECS 2005, May 2005, Quebec, Cananda.
SOI for High-Temperature Electronics
SOI is the most efficient and reliable technology to design high-temperature electronics. Standard BULK processes are leaky, temperature-unstable and sensitive to latch-up (destructive process). GaAs is very expensive and not suited to integrate analog or digital circuits.
However, SiC is a very promising technology for High-Temperature/High-Power applications. Combining SOI (analog, digital control & drivers) and SiC (Power Devices) will be a wining solution in future High-Temperature Power Electronics.
